Study of the interband tunneling phenomenon between low dimensional carrier gases in tunnel field-effect transistor
Miniaturization of semiconductor devices is the most critical growth factor of the semiconductor circuits integration scale. When scaling down the dimensions of MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistor) new unwanted effects appear, e.g.: DIBL (Drain Induced Barrier Lowering), carrier velocity saturation, hot carrier effects or impact ionization. These factors degrade the device’s characteristics. In modern integrated circuits, power consumption is the biggest problem that limits computational technology progress. The minimum supply voltage (Vdd) for digital circuits discussed in the literature is about 0.1 V. The subthreshold swing (SS) is a crucial factor influencing the possibility of scaling the power supply and improving the device efficiency.
The conventional MOSFET has the fundamental limit for the sub-threshold swing due to the thermionic electron emission-type transport. This means that it cannot be smaller than 60 mV/decade at room temperature. Reducing Vdd by 10x results in a 100x save in dynamic power of a device which transfers to an enormous save in power of IC (100 x ”number of transistors in IC”). In order to continue the progress in computational technology, a new class of devices is needed. One of the most promising candidates is the Tunnel Field Effect Transistor (TFET). It exploits the quantum mechanical effect called interband tunneling as a transport mechanism. Due to this fact, it is possible to obtain a subthreshold swing smaller than 60 mV/dec. In order to study the transport in TFET devices, proper physical models and simulation tools are needed. The project’s main goal is the theoretical study of tunneling between low-dimensional regions in different TFET structures. For this purpose, a dedicated advanced numerical simulator will be developed.
Under PRELUDIUM 16 call, National Science Centre Polandi
148 500 PLN
Piotr Wiśniewski, PhD Eng.